EODData

FRA, CDS: Cadence Design Systems Inc

22 Jan 2026
LAST:

269.8

CHANGE:
 1.80
OPEN:
268.1
HIGH:
270.4
ASK:
0.0
VOLUME:
406
CHG(%):
0.67
PREV:
268.0
LOW:
268.0
BID:
0.0
 

CHART

RECENT END OF DAY PRICES

DateOpenHighLowCloseVolume
22 Jan 26268.1270.4268.0269.8406
21 Jan 26261.3268.0260.4268.0524
20 Jan 26266.4266.4260.5260.715
19 Jan 26265.1269.1265.1266.70
16 Jan 26276.4276.9272.6272.8318
15 Jan 26268.7278.8268.7276.0953
14 Jan 26275.9276.7266.0268.0720
13 Jan 26277.8280.5276.0277.01.5K
12 Jan 26279.2279.8276.6278.7266
09 Jan 26272.9280.9272.5280.9178

PROFILE

Name:Cadence Design Systems Inc
About:Cadence Design Systems, Inc. provides software, hardware, and other services worldwide. The company offers functional verification services, such as Jasper, a formal verification platform; Xcelium, a parallel logic simulation platform; Palladium, an enterprise emulation platform; and Protium, a prototyping platform for chip verification. It also provides digital IC design and sign off products, including Genus synthesis and Joules RTL power solutions, as well as Modus DFT software solution to reduce systems-on-chip design-for-test time; physical implementation tools, such as place and route, optimization, and performing sign-off checks for manufacturing; and Innovus implementation system, a digital IC design and signoff solution. In addition, the company offers custom IC design and simulation, such as Virtuoso Studio, a solution platform for custom, analog, mixed-signal, photonics, and RF semiconductors; and system design and analysis products, a Multiphysics platform that helps in design and simulate electronics and entire systems in electromagnetic, thermal, structure, computational fluid dynamics, molecular, PCB and packaging, mechanical, and structural analysis. Further, it provides semiconductor IP product for design architectures; Functional Verification; digital ic design and signoff; EDA product that addresses the design and verification for semiconductor chips and manufacturing process technologies; and verification IP with memory models to emulate and model the expected behavior and interaction of standard industry system interface protocols. Additionally, it offers services related to methodology, education, and hosted design solutions, as well as technical support and maintenance services. It serves consumer, hyperscale computing, 5G communications, mobile, automotive, aerospace and defense, industrial, and life science industries. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.
Sector:Technology
Address:Building 5, San Jose, CA, United States, 95134
Website:https://www.cadence.com
ISIN:US1273871087
LEI:GCT7RXJOGLXPV0NXZY22

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FUNDAMENTALS

Trailing P/E:81.23 
Forward P/E:77.25 
PEG Ratio:77.25 
Price to Sales:14.13 
Price to Book:16.55 
Profit Margin:0.20 
Operating Margin:0.35 
Return on Assets:0.11 
Return on Equity:0.22 
Revenue:4.423B 
EBITDA:1.665B 
Shares:272.49M 
Market Cap:73.504B 

TECHNICAL INDICATORS

MA5:267.570.8%
MA10:271.830.8%
MA20:270.160.2%
MA50:272.401.0%
MA100:283.985.3%
MA200:276.942.7%
STO9:45.96
STO14:55.06
RSI14:53.32
WPR14:-44.94
MTM14:13.60
ROC14:0.05 
ATR:7.38 
Week High:278.753.3%
Week Low:260.353.6%
Month High:280.854.1%
Month Low:256.152.7%
Year High:327.0321.2%
Year Low:193.6739.3%
Volatility:8.83